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document version: 1 date: 2004/5/10 product functional specification 15 inch xga color tft lcd module model name : b150xg02 v.2 ( ? ) preliminary specification ( ) final specification note: this specification is subject to change w i thout notice. (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 1/ 22 no reproduction and redistribution allow ed. www..net
i. content s 1.0 handling precautions 2.0 general description 2.1 characteristics 2.2 functional block diagram 3.0 absolute maximum ratings 4.0 optical characteristics 5.0 signal interface 5.1 connectors 5.2 signal pin 5.3 signal description 5.4 signal electrical characteristics 5.5 signal for lamp connector 6.0 pixel format image 7.0 parameter guide line for ccfl inverter 8.0 interface timings 8.1 timing characteristics 8.2 timing definition 9.0 power consumption 10.0 power on/off sequence 11.0 mechanical characteristics (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 2/ 22 no reproduction and redistribution allow ed. www..net
ii record of revision version and date p a g e o l d d e s c r i p t i o n n e w d e s c r i p t i o n r e m a r k 0.1. 2004/5/10 all first edition for customer all (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 3/ 22 no reproduction and redistribution allow ed. www..net
1.0 handing precautions 1) since front polarizer is easily dam aged, pay attention not to scratch it. 2) be sure to turn off power supply when in serting or disconnecting from input connector. 3) wipe off water drop immediately. long cont act with water may cause discoloration or spots. 4) when the panel surface is soiled, wipe it with absorbent cotton or other soft cloth. 5) since the panel is made of glass, it ma y break or crack if dropped or bumped on hard surface. 6) since cmos lsi is used in th is module, take care of static electricity and insure human earth when handling. 7) do not open nor modify the module assembly. 8) do not press the reflector sheet at t he back of the module to any directions. 9) in case if a module has to be put back into the packing container slot after once it was taken out from the container , do not press the center of the ccfl reflector edge. instead, press at the far ends of the cfl reflector edge softly. otherwise the tft module may be damaged. 10) at the insertion or remova l of the signal interface connector, be sure not to rotate nor tilt the interface connector of the tft module. 11) after installation of the tft module in to an enclosure (notebook pc bezel, for example), do not twist nor bend the tft module even mom entary. at designing the enclosure, it should be taken into consider ation that no bending/twisting forces are applied to the tft module from outside. otherwise the tft module may be damaged. 12) cold cathode fluorescent lamp in lcd contai ns a small amount of mercury. please follow local ordinances or regulations for disposal. 13) small amount of materials having no flammab ility grade is used in the lcd module. the lcd module should be supplied by power complied with requirement s of limited power source(2.1 1, iec60950 or ul1950), or be applied exemption. 14) the lcd module is designed so that the cfl in it is supplied by limited current circuit(2.4, iec60950 or ul1950). do not connect the cfl in hazardous voltage circuit. (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 4/ 22 no reproduction and redistribution allow ed. www..net
1.0 general description this specification applies to the 15.0 inch color tft/lcd module b150xg02 v.2. this module is designed for a display unit of notebook style personal computer. the screen format is intended to support the xga (1024(h) x 768(v)) screen and 262k colors (rgb 6-bits data driver). all input signals are lvds interface compatible. this module does not contain an inverter card for backlight. (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 5/ 22 no reproduction and redistribution allow ed. www..net
2.1 display characteristics the following items are characterist ics summary on the table under 25 j condition: i t e m s u n i t s p e c i f i c a t i o n s screen diagonal [mm] 381 active area [mm] 304.1 x 228.1 pixels h x v 1024(x3) x 768 pixel pitch [mm] 0.297x0.297 pix e l arrangement r.g.b. vertical stripe display mode normally white typical white luminance (icfl=6.0ma) [cd/m 2 ] 170 (5 point average) luminance uniformity 1.25 max. (5 pts) 1.65 max. (13pts) contrast ratio 300 typ. optical rise time/fall time [msec] 16/9 nominal input voltage vdd [volt] +3.3 typ. typical power consumption (vdd line + vcfl line) [watt] 5.6 w e i g h t [ g r a m s ] 5 8 5 g t y p . physical size [mm] 317.3 x 242.0 x 6.5 max. electrical interface 1 channel lvds support c o l o r native 262k colors ( rgb 6-bit data driver ) temperature range operating storage (shipping) [ o c] [ o c] 0 to +50 -20 to +60 surface treatment 3h (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 6/ 22 no reproduction and redistribution allow ed. www..net
2.2 functional block diagram the following diagram shows the functional block of the 15.0 inches color tft/lcd module: tft a rra y / cell 6b it color dat a for r / g / b hs y n c vs y n c v dd lc d c o ntro ller lcd dr i v e car d bac k l i g ht uni t 1024(r/g / b) x 3 gnd dc - d c c o nv er ter re f c i r c u i t y -d ri v e r x-d r i v e r dspt mg (3 p a ir s l v d s ) dt c l k ( 1 p a ir l v d s ) ja e ja e fi - x b30sl- h f 10 mat i ng t y pe ja e fi - s 30m lcd con nec t o r jst bhs r - 0 2 vs- 1 ma t i n g t yp e s m 02b - b h ss - 1 lam p c o nnec t o r (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 7/ 22 no reproduction and redistribution allow ed. www..net
2.0 absolute maximum ratings absolute maximum ratings of the module is as following: i t e m s y m b o l m i n m a x u n i t c o n d i t i o n s logic/lcd drive voltage vdd -0.3 +4.0 [volt] input voltage of signal vin -0.3 vdd+0.3 [volt] ccfl current icfl - 7 [ma] rms ccfl ignition voltage vs - 1150 vrms operating temperat u r e t o p 0 + 5 0 [ o c ] n o t e 1 operating humidity hop 8 95 [%rh] note 1 storage temperature tst -20 +60 [ o c ] n o t e 1 storage humidity hst 5 95 [%rh] note 1 v i b r a t i o n 1 . 5 1 0 - 5 0 0 (random) g hz 2hr/ax i s, x,y,z shock 220 , 2 g ms half sine wave note 1 : maximum wet-bulb should be 39 j and no condensation. (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 8/ 22 no reproduction and redistribution allow ed. www..net
4.0 optical characteristics the optical characteristics are measured under stable conditions as follows under 25 j condition: i t e m c o n d i t i o n s t y p . n o t e viewing angle [degree] [degree] horizontal (right) k = 10 (left) 40 40 ? ? k: contrast ratio [degree] [degree] vertical (upper) k = 10 (lower) 10 30 ? ? contrast ratio 3 0 0 ? luminance uniformity 1.25 max. (5 pts) 1.65 max. (13pts) response time [msec] rising 1 6 2 4 ( m a x . ) (room temp.) [msec] falling 9 1 1 ( m a x . ) color red x t b d c h r o m a t i c i t y r e d y t b d coordinates (cie) green x t b d green y t b d b l u e x t b d blue y t b d w h i t e x 0 . 3 1 3 + - 0 . 0 3 white y 0 . 3 2 9 + - 0 . 0 3 white luminance (ccfl 6.0 ma) [c d/m 2 ] 170 (5 points average) (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 9/ 22 no reproduction and redistribution allow ed. www..net
5.0 signal interface 5.1 connectors physical interface is described as for the connector on module. these connectors are capable of accommodating the following signals and will be following components. connector name / designation for signal connector manufacturer jae or compatible type / part number jae fi-xb30sl-hf10 mating housing/part number fi-x30m, fi-x30c or fi-x30h mating contact/part number fi-c3-a1 connector name / designation for lamp connector manufacturer jst type / part number bhsr-02vs-1 mating type / part number sm02b-bhss-1-tb 5.2 signal pin pin# signal name pin# signal name 1 g n d 2 v d d 3 v d d 4 v e d i d 5 n c 6 c l k e d i d 7 d a t a e d i d 8 r x i n 0 - 9 r x i n 0 + 1 0 g n d 1 1 r x l n 1 - 1 2 r x l n 1 + 1 3 g n d 1 4 r x i n 2 - 1 5 r x i n 2 + 1 6 g n d 1 7 r x c l k i n - 1 8 r x c l k i n + 1 9 g n d 2 0 g n d 2 1 n c 2 2 n c 2 3 n c 2 4 n c 2 5 n c 2 6 n c 2 7 n c 2 8 n c 2 9 n c 3 0 n c (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 10/ 22 no reproduction and redistribution allow ed. www..net
5.3 signal description the module using a lvds receiver. lvds is a differential signal technology for lcd interface and high speed data transfer device. transmitte r shall be sn75lvds84 (negative edge sampling) or compatible. signal name description rx in0-, rx in0+ lvds differential data input(red0-red5, green0) rx in1-, rx in1+ lvds differential data i nput(green1-green5, blue0-blue1) rx in2-, rx in2+ lvds differential data input(blue2- blue5, hsync, vsync, dsptmg) rxclkin-, rxclkin0+ lvds differential clock input vdd +3.3v power supply gnd ground note: input signals shall be low or hi-z state when vdd is off. internal circuit of lvds inputs are as following. (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 11/ 22 no reproduction and redistribution allow ed. www..net
(c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 12/ 22 no reproduction and redistribution allow ed. r r r r sn75 l v d s 86 or c o m p atible t 0 + 0 - + 1 - + 2 - kin+ ki n - signal inpu pi n n o . 9 11 12 14 15 17 18 8 rxin rxin rx i n 1 rxin rx i n 2 rxin r x cl r x cl the module uses a 100ohm resistor bet ween positive and negative dat a lines of each receiver input signal name description red5 red4 red3 red2 red1 red0 red data 5 (msb) red data 4 red data 3 red data 2 red data 1 red data 0 (lsb) red-pixel data red-pixel data each red pixel's brightness data consists of these 6 bits pixel data. www..net
green 5 green 4 green 3 green 2 green 1 green 0 green data 5 (msb) green data 4 green data 3 green data 2 green data 1 green data 0 (lsb) green-pixel data green-pixel data each green pixel's brightness data consists of these 6 bits pixel data. blue 5 blue 4 blue 3 blue 2 blue 1 blue 0 blue data 5 (msb) blue data 4 blue data 3 blue data 2 blue data 1 blue data 0 (lsb) blue-pixel data blue-pixel data each blue pixel's brightness data consists of these 6 bits pixel data. dtclk data clock the typical frequency is 54.0 mhz.. the signal is used to strobe the pixel data and dsptmg signals. all pixel data shall be valid at the falling edge when the dsptmg signal is high. dsptmg display timing this signal is strobed at the falling edge of -dtclk. when the signal is high, the pixel data shall be valid to be displayed. vsync vertical sync the signal is synchronized to -dtclk . hsync horizontal sync the signal is synchronized to -dtclk . note: output signals from any system sha ll be low or hi-z state when vdd is off. 5.4 signal electrical characteristics input signals shall be low or hi-z state when vdd is off. it is recommended to refer the specifications of sn75lvds86dgg(texas instruments) in detail. signal electrical characteristics are as follows; p a r a m e t e r c o n d i t i o n m i n m a x u n i t vth differential input high voltage(vcm=+1.2v) 100 [mv] vtl differential input low voltage(vcm=+1.2v) -100 [mv] lvds macro ac characteristics are as follows: (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 13/ 22 no reproduction and redistribution allow ed. www..net
m i n . max . clock frequency (t) 50mhz 68mhz data setup time (tsu) 600ps data hold time (thd) 600ps thd tsu input clock input data t 5.5 signal for lamp connector pin # si g nal name 1 lam p hi g h volta g e 2 lam p low volta g e 6.0 pixel format image following figure shows the relationship of the input signals and lcd pixel format. (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 14/ 22 no reproduction and redistribution allow ed. www..net
r g b r g b r g b r g b r g b r g b r g b r g b 0 1 1022 1023 1s t l i n e 7 6 8 t h l i ne 7.0 parameter guide line for ccfl inverter p a r a m e t e r m i n d p - 1 m a x u n i t s c o n d i t i o n white luminance 5 points average - 170 ? j ) ccfl current(icfl) 3.0 6 . 0 7 . 0 [ m a ] rms (ta=25 j ) note 2 ccfl f r e q u e n c y ( f c f l ) 4 0 5 0 6 0 [ k h z ] (ta=25 j ) note 3 ccfl ignition voltage(vs) ? j ) note 4 ccfl voltage (reference) (vcfl) ? ? j ) note 5 ccfl power consumption (pcfl) ? ? j ) note 5 note 1: dp-1 are auo recommended design points. *1 all of characteristics listed are measured under the condition using the auo test inverter. *2 in case of using an inverter other than lis ted, it is recommended to check the inverter carefully. sometimes, interfering noise st ripes appear on the scree n, and substandard luminance or flicker at low power may happen. (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 15/ 22 no reproduction and redistribution allow ed. www..net
*3 in designing an inverter, it is suggested to check safety circuit ver carefully. impedance of cfl, for instance, becomes more than 1 [m ohm] when cfl is damaged. *4 generally, cfl has some amount of delay time after applying kick- off voltage. it is recommended to keep on applying kick-off voltage for 1 [sec] until discharge. *5 cfl discharge frequency must be carefully chos en so as not to produc e interfering noise stripes on the screen. *6 reducing cfl current increases cfl discharge voltage and generally increases cfl discharge frequency. so all the par ameters of an inverter shoul d be carefully designed so as not to produce too much leakage current fr om high-voltage output of the inverter. note 2: it should be emplyed the inverter which has ?duty dimming?, if icfl is less than 4ma. note 3: cfl discharge frequency should be carefully determined to avoid interference between inverter and tft lcd. note 4: cfl inverter should be able to give out a power that has a generating capacity of over 1,400 voltage. lamp units need 1,400 voltage minimum for ignition. note 5: calculator value for reference (icflvcfl=pcfl) 8.0 interface timings basically, interface timings should match the vesa 1024x768 /60hz (vg901101) manufacturing guide line timing. 8.1 timing characteristics sy m b o l d e s c r i p t i o n m i n ty p m a x u n i t fdc k dtclk frequency 50 65.00 68 [mhz ] tc k dtclk cy cle time 15.38 [ n sec] tx x total time 1206 1344 1648 [ t ck] tac x x ac tive time 1024 [ t ck] tbk x x blank time 90 320 [ t ck] hsy n c h frequency 48.363 [khz ] hsw h-sy nc width 2 136 [ t ck] hbp h back porch 4 160 [ t ck] hfp h front porch 8 24 [ t ck] ty y total time 771 806 895 [tx] tac y y ac tive time 768 [tx] vs ync frame rate (55) 60 61 [hz ] vw v-sync width 2 6 [tx] vfp v-sync front porch 1 3 [tx] vbp v-sync back porch 7 29 63 [tx] note: hsw(h-sync width) + hbp(h-sync back porch) should be less than 515 tck. (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 16/ 22 no reproduction and redistribution allow ed. www..net
8.2 timing definition tx hs w hb p hf p ta c x h- s y nc d sptm 38 t x 3t x 29tx 6t x 768t x v- syn c ds p t m 9.0 power consumption input power specifications are as follows; s y m b l e p a r a m e t e r m i n t y p m a x units c o n d i t i o n v d d l o g i c / l c d d r i v e voltage 3.0 3.3 3.6 [volt] load capacitance 20uf p d d v d d p o w e r 1.26 [watt] all black pattern pdd max vdd power max 1.91 [watt] max pattern note i d d i d d c u r r e n t 3 8 0 m a all blac k pattern idd max idd current max 5 8 0 m a max pattern note v d d r p a l l o w a b l e logic/lcd drive ripple voltage 1 0 0 [ m v ] p-p v d d n s a l l o w a b l e logic/lcd drive ripple noise 1 0 0 [ m v ] p-p note : vdd=3.3v (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 17/ 22 no reproduction and redistribution allow ed. www..net
10. power on/off sequence vdd power and lamp on/off sequence is as follows. interface signals are also shown in the chart. signals from any system shall be hi- z state or low level when vdd is off. 90% 10% 10% 10% 90% 10m s m a x . 0- 50 m s 0- 50 m s 0 v 0 v vd d si gna l s 10% 10% 200m s m i n. 200 m s m i n 0 v la m p on 10% 10% 400m s m i n. (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 18/ 22 no reproduction and redistribution allow ed. www..net
11. mechanical characteristics (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 19/ 22 no reproduction and redistribution allow ed. www..net
(c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 20/ 22 no reproduction and redistribution allow ed. www..net
fig. screw hole depth and suggested screw penetration suggested torque is 2.0+/- 0.2kgf-cm, also shown in the module drawing. fig. gap between films and glass (c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 21/ 22 no reproduction and redistribution allow ed. www..net
(c) copy right au optronics, inc. august, 2001 all rights reserved. b150xg02 v.2 ver.1 22/ 22 no reproduction and redistribution allow ed. www..net

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